Jean-Philippe Diguet – Publications

Selection (May. 2022)

International Journal Papers

  • M. Rizk, K. Martin and J-Ph. Diguet, Run-time remapping algorithm of dataflow actors on NoC-based heterogeneous MPSoCs, IEEE Trans. On Parallel and Distributed Systems, Vol.x, Issue y, xx, 2022, Accepted in May 22, DOI: 10.1109/TPDS.2022.3177957
  • K.A.Ali, A.Baghdadi, E.Dupraz, M.Léonardon, M.Rizk and J-Ph.Diguet, MOL-based In-Memory Computing of Binary Neural Networks, IEEE Trans. on VLSI, Vol.x, Issue x, Accepted in Feb.22. Early Access DOI: 10.1109/TVLSI.2022.3163233.
  • A.Ghasemi, M.Ruaro, R.Cataldo, J‑Ph.Diguet,  K.J.M.Martin, The Impact of Cache and Dynamic Memory Management in Static Dataflow Applications, Journal of Signal Processing Systems, 2022, DOI: 0.1007/s11265-021-01730-7.
  • K. Jallouli, M. Mazouzi, J-Ph. Diguet, A. Monemi, S. Hasnaoui. MIMO-OFDM LTE System based on a parallel IFFT/FFT on NoC-based FPGA. Annals of Telecommunications, Springer, 2022, DOI: 10.1007/s12243-021-00901-8.
  • L.Mejias, J-Ph.Diguet, C.Dezan, D.Campbell, J.Kok and G.Coppin, Embedded Computation Architectures for Autonomy in Unmanned Aircraft Systems (UAS), Sensors, Feb. 2021, DOI: 10.3390/s21041115
  • R.Cataldo, R.Fernandes, K.Martin, J. Silveira, G. Sanchez, J.Sepulveda, C. Marcon and J-Ph. Diguet, Subutai: Speeding up Legacy Parallel Applications through Data Synchronization, IEEE Trans. On Parallel and Distributed Systems, Vol.32, Issue 5, May, 2021, DOI: 10.1109/TPDS.2020.3040066.
  • P. Gautier, J. Laurent and J-Ph. Diguet, DQN as an alternative to Market-based approaches for Multi-Robot processing Task Allocation (MRpTA), International Journal of Robotic Computing, Vol. 3, No. 1, 2021.
  • W. Touzout, Y. Benmoussa, D. Benazzouz, E. Moreac and J-Ph. Diguet, Unmanned Surface Vehicle Energy Consumption Modelling Under Various Realistic Disturbances Integrated Into Simulation Environment, Ocean Engineering Journal, Accepted in Dec. 20, Vol. 222, Feb. 2021, DOI: 10.1016/j.oceaneng.2020.108560
  • R. Arakawa, N. Onizawa, J-Ph. Diguet, and T. Hanyu, Multi-Context TCAM-Based Selective Computing: Design Space Exploration for a Low-Power NN,  IEEE Trans. on Circuits and Systems I, Vol.69, Issue 1, Jan. 2021, DOI: 10.1109/TCSI.2020.3030104.
  • K. Alhaj Ali, M. Rizk, A. Baghdadi, J-Ph. Diguet, J. Jomaah, N. Onizawa, T. Hanyu, Memristive Computational Memory Using Memristor Overwrite Logic (MOL), IEEE Trans. on VLSI, Vol.28, Issue 11, Nov. 2020.
  • S. Paul, N. Chatterjee, P. Ghosal and J-Ph. Diguet, Adaptive Task Allocation and Scheduling on NoC based Multicore Platforms with Multitasking Processors, ACM Trans. on Embedded Computing Systems (TECS), Vol. 20 No 1, Janv. 21, DOI: 10.1145/3408324.
  • A. K. Biswas, N.Chatterjee, H. K. Mondal, G. Gogniat and J-Ph. Diguet, Attacks toward Wireless Network-on-Chip and Countermeasures, IEEE Trans. on Emerging Topics in Computing (TETC), Special Issue on Emerging Trends and Computing Paradigms for Testing, Reliability and Security in Future VLSI Systems vol.9, Issue 2, pp. 692-706, Apr-Jun. 2021. (accepted in Feb. 20) DOI: 10.1109/TETC.2020.2973427.
  • Y. Rioual, J. Laurent and J-Ph. Diguet, Reinforcement-Learning Approach Guidelines for Energy Management, Journal of Low Power Electronics Vol. 15(3), 10.1166/jolpe.2019.1618, 2019.
  • M. Dridi, S. Rubini, M. Lallali, M. J. Sepulveda, F. Singhoff, and J.-Ph. Diguet, Design and multi-abstraction level evaluation of a NoC Router for Mixed-Criticality Real-Time Systems, ACM Journal on. Emerging Technologies in Computing (JETC), Vol. 15 Issue 1, Article No. 2, Feb. 2019.
  • M. Tréhin, J. Laurent, H. Kerhascoët, A. Rossi, J-Ph. Diguet. An Energy E?icient Autopilot Design. Journal of Sailing Technology, The Society of Naval Architects and MarineEngineers, 2019, 5 (1).
  • J-Ph. Diguet, N. Onizawa, M. Rizk, J. Sepulveda, A. Baghdadi and T. Hanyu, Networked Power-Gated MRAMs for Memory-Based Computing, IEEE Trans. on VLSI, Vol. 26 , Issue 12, Dec. 2018.
  • C. Hireche, C. Dezan, S. Mocanu, D. Heller and J-Ph. Diguet, Context/Resource-Aware Mission Planning Based on BNs and Concurrent MDPs for Autonomous UAVs, Sensors. 18(12):4266, Dec. 2018.
  • G. Ochoa-Ruiz, R. Bevan, F. de Lamotte, J-Ph. Diguet , Towards Dynamically Reconfigurable SoCs (DRSoCs) in industrial automation: state of the art, challenges and opportunities, Microprocessors and Microsystems (MICPRO) Journal, Volume 62, Pages 20-40, Oct. 2018.
  • G. Ochoa-Ruiz, P. Wattebled, M. Touiza, F. De Lamotte, E-B. Bourennane, S. Meftali, J-L. Dekeyser and J-Ph. Diguet, A modeling front-end for seamless design and generation of context-aware Dynamically Reconfigurable Systems-on-Chip, Journal of Parallel and Distributed Computing, Vol. 112, pp. 1 – 19, Feb.  2018.
  • S. Zermani, C. Dezan, C. Hireche, R. Euler, J-Ph. Diguet, Embedded context aware diagnosis for a UAV SoC platform, Microprocessors and Microsystems (MICPRO) Journal, Vol. 51, pp. 185 – 197, 2017
  • M. Tréhin, J. Laurent and J-Ph. Diguet, Simulation of Multi-source Electric Production and Energy Transfers in Sailing, Journal of Shipping and Ocean Engineering,  7 (1), pp.9, 2017.
  • V. Lapôtre, G. Gogniat, A. Baghdadi and J-Ph. Diguet, Dynamic configuration management of a multi-standard and multi-mode reconfigurable multi-ASIP architecture for turbo decoding, EURASIP Journal on Advances in Signal Processing, 2017:35, May 2017.
  • G. Ochoa-Ruiz, R. Bevan, F. de Lamotte, J-Ph. Diguet and C-C. Bao, Real-Time Control System for Improved Precision and Throughput in an Ultrafast Carbon Fiber Placement Robot Using a SoC FPGA Extended Processing Platform, Int. Journal of Reconfigurable Computing, vol. 2017, Article ID 3298734,  2017.
  • X. An, E. Rutten, J-Ph. Diguet, A. Gamatié, Model-based design of correct controllers for dynamically reconfigurable architectures, ACM Trans. on Embedded Computing Systems (TECS), Vol. 15 Issue 3, July 2016, Article No. 51.
  • Y. Corre, J-Ph. Diguet, D. Heller, D. Blouin, L. Lagadec, TBES: Template-Based Exploration and Synthesis of Heterogeneous Multiprocessor Architectures on FPGA, ACM Trans. on Embedded Computing Systems (TECS), Vol. 15 Issue 1, Article. No. 9, Jan. 2016.
  • V. Lapôtre, P. Murugappa, G. Gogniat, A. Baghdadi, M. Hu?bner and J-Ph. Diguet, A Dynamically Reconfigurable Multi-ASIP Architecture for Multistandard and Multimode Turbo Decoding, IEEE Trans. on VLSI, vol.24, no.1, pp.383-387, Jan. 2016.
  • G. Ochoa Ruiz, S. Guillet, F.  De Lamotte, E. Rutten, B. El-Bay, J-Ph. Diguet, G. Gogniat, An MDE Approach for Rapid Prototyping and Implementation of Dynamic Reconfigurable Systems, ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 21 Issue 1,  Article No. 8, Nov. 2015 .
  • T. D. Ngo,  K. J. M. Martin , J-Ph. Diguet, Move Based Algorithm for Runtime Mapping of Dataflow Actors on Heterogeneous MPSoCs, Journal of Signal Processing Systems, Springer, Nov. 2015
  • M.J. Sepùlveda, J-Ph. Diguet, G. Gogniat and M. Strum, NoC-based Protection for SoC Time-Driven Attacks, IEEE Embedded System Letters, Vol. 7, Issue 1, Mars. 2015.
  • J-Ph. Diguet, N. Bergmann and J-C. Morgère, Dedicated Object-Processor for Mobile Augmented Reality , Sailor Assistance Case Study, EURASIP Journal on Embedded Systems, Janv. 2015.
  • S. Guillet, F. De Lamotte, N. Le Griguer, E. Rutten, G. Gogniat and J-Ph. Diguet, Extended UML/MARTE to support Discrete Controller Synthesis, application to Reconfigurable Systems-on-Chip modeling, ACM Trans. on Reconfigurable Technology and Systems (TRETS),  7(3): 27, 2014
  • R. Dafali, J-Ph. Diguet and J-C. Creput, Self-Adaptive Network-on-Chip Interface, IEEE Embedded Systems Letters, Vol. 5 Issue: 4 , Dec. 2013. (pdf)
  • J. Crenne, R. Vaslin, G. Gogniat, J-Ph. Diguet, R. Tessier and D. Unnikrishnan, Configurable Memory Security in Embedded Systems, in ACM Transactions on Embedded Computer Systems (TECS), Vol. 12, No. 3, Article 71, March 2013.
  • K. Loukil, N. Ben Amor, M. Abid and J-Ph. Diguet, Self-Adaptive on-Chip System Based on Cross-Layer Adaptation Approach, Hindawi Int. Journal of reconfigurable computing,  Volume 2013, Article ID 141562, Oct. 2013.
  • J. Shield, J-Ph. Diguet and G. Gogniat, Asymmetric Cache Coherency: Policy Modifications to Improve Multicore Performance, ACM Transactions on Reconfigurable Technology and Systems (TRETS), Vol. 5 Issue 3, No. 12, October 2012.
  • H. Liu, C. Jego E.Boutillon, M.Jezequel, J-Ph. Diguet, A contribution to the reduction of the dynamic power dissipation in the turbo decoder,  in Annals of telecommunications, Spinger, (Accepted oct. 2011), vol. 67, no7-8, pp. 397-406, 2012.
  • J.Ph Diguet, Y. Eustache, G. Gogniat, Closed-loop based self-adaptive HW/SW embedded systems: design methodology and smart cam case study, in ACM Transactions on Embedded Computing Systems (TECS), vol.10, issue.3, April 2011.
  • S.Dhouib, E. Senn, J-Ph.Diguet, D.Blouin and J.Laurent, Energy and power consumption estimation for embedded applications and operating systems, Journal of Low Power Electronics, Vol. 5, N.3, Dec. 2009.
  • H.Liu, C.Jego, E.Boutillon, J-Ph.Diguet and M.Jezequel, Scarce state transition turbo decoding based on re-encoding combined with a dummy insertion, Electronics letters, vol. 45, n. 16, pp. 846-848, july, 2009.
  • R.Abildgren, J-Ph.Diguet, P.Bomel, G.Gogniat, P.Koch and Y.Le Moullec, A Priori Implementation E?ort Estimation for HW Design Based on Independent-Path Analysis, EURASIP Jour. of Embedded Systems (JES), Sep., 2008.
  • R.Vaslin, G.Gogniat, J-Ph.Diguet, E.Wanderley, R.Tessier and W.Burleson, A Security Approach for O?-chip Memory in Embedded Microprocessor Systems, Journal on Microprocessors and Microsystems, Elsevier, Aug.,2008.
  • G.Gogniat, T.Wolf, W.Burleson, J-Ph.Diguet, L.Bossuet and R.Vaslin, Recon?gurable hardware for high-security high-performance embedded systems : The SAFES perspective, IEEE Trans. on VLSI Systems SpecialSection on Con?gurable Computing Design, No.2, Vol.16, Feb., 2008.
  • Y.Eustache, J-Ph.Diguet, Recon?guration Management in the context of RTOS-based HW/SW embedded systems, special issue on Operating System Support for Embedded Real-Time Applications, EURASIP Jour. of Embedded Systems (JES), Jan., 2008.
  • S.Evain, J-Ph.Diguet and D.Houzet, NoC design flow for TDMA and QoS Management in a GALS context, EURASIP Journal on Embedded Systems, vol. 2006,  Article ID 63656, 2006
  • J-Ph.Diguet,G.Gogniat, J-L.Philippe, Y.Le Moullec, S.Bilavarn, C.Gamrat, K. Ben Chehida, M.Auguin, X.Fornari, A-M.Fouillart, P.Kajfasz, EPICURE : A Partitioning and CoDesign Framework For Reconfigurable Computing, Journal of Microprocessor and Microsystems, Special issue on FPGA-based Reconfigurable Computing, Elsevier Ed.,Vol.30, No.6, pp 367-387, Sep. 2006. 
  • H.Tmar, J-Ph.Diguet, A.Azzedine, M.Abid and J-L.Philippe, RTDT : a Static QoS Manager, RT Scheduling, HW/SW Partitioning CAD Tool, MicroElectronics Journal , vol. 37 , pp. 1208-1219, nov., 2006.
  • Y.Le Moullec, J-Ph.Diguet, N.Ben Amor, T. Gourdeaux, J-L.Philippe, Algorithmic-level Specification and Characterization of Embedded Multimedia Applications with Design Trotter, Jour. of VLSI Signal Processing, Springer (formely Kluwer Academic Publishers), vol. 42, no 2, Feb., 2006.
  • N.Ben Amor, Y.Le Moullec, J-Ph.Diguet, J-L.Philippe and M.Abid, Design of multimedia processor based on metric computation, Jour. Advances in Engineering Software, Elsevier Science, vol. 36, no.7, july, 2005.
  • S.Bilavarn, E.Debes, P.Vandergheynst and J-Ph.Diguet, Processor Enhancements for Media Streaming Application, Jour. of VLSI Signal Processing, Springer (formely Kluwer Academic Publishers), vol.41, no.2, sep. 2005.
  • Y.Le Moullec, J-Ph.Diguet, T.Gourdeaux, J-L.Philippe, Design Trotter : System-Level Dynamic Estimation Task a 1st step towards platform architecture selection, Journal of embedded computing (JEC), IOS Press, vol.1, no. 4,  2005.
  • B.Bouallegue, R.Djemal, G.Hattab, J-Ph.Diguet, J-L.Philippe and R.Tourki, Protocol architecture for MPEG-2 video over a high-speed network, IEE Proceedings-communications, feb., 2004.
  • H.Guesmi, R.Djemal, B.Bouallegue, J-Ph.Diguet and R.Tourki, High performance architecture of integrated protocols for encoded video application, Jour. of Computer standards & interfaces, Elsevier Science, dec, 2003.
  • J-Ph.Diguet, D.Chillet, O.Sentieys, A Framework for High Level Estimations of Signal Processing VLSI Implementations, Jour. of VLSI signal processing, Kluwer Academic Publishers, Vol . 25, pp 261-284, Jul. 2000.
  • S.Wuytack, J.Ph.Diguet, F.Catthoor, H.De Man,  Formalized methodology for data reuse exploration for low-power hierarchical memory mappings, IEEE Trans. on VLSI Systems, Vol . 6, No.4, pp 529-537,Dec. 1998.
  • P.Amayenc, J-Ph.Diguet, M.Marzoug, T.Tani; A class of single and dual-frequency algorithms for rain-rate profiling from a spaceborne radar. Part II: Tests from airborne radar data; Jour. of Atmospheric and Oceanic Technology; Feb. 96, Vol. 13, pp 142-164.

arXiv

  • Y. Rioual, Y. Le Moullec, J. Laurent, M. I. Khan, J-Ph. Diguet, Design and Comparison of Reward Functions in Reinforcement Learning for Energy Management of Sensor Nodes, arXiv:2106.01114, June. 202

International Conferences

  •  N. Chatterjee, M. Ruaro, K. J. M. Martin and J-Ph. Diguet, Mitigating Transceiver and Token Controller Permanent Faults in Wireless Network-on-Chip, 30th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP), 2022.
  • S. Paul, N. Chatterjee, P. Ghosal and J-Ph. Diguet, A Hybrid Adaptive Strategy for Task Allocation and Scheduling for Multi-applications on NoC-based Multicore Systems with Resource Sharing,  in Design Automation & Test in Europe (DATE), Grenoble (Virtual), Feb. 2021.
  • A. Ghasemi, R. Cataldo, J-Ph. Diguet and K. J. M. Martin, On Cache Limits for Dataflow Applications and Related Efficient Memory Management Strategies, Conf. on Design and Architectures
  • for Signal and Image Processing (DASIP), HiPEAC Workshop, Jan. 2021.
  • E. Moréac, E. M. Abdali, F. Berry, D. Heller, J-Ph. Diguet, Hardware-in-the-loop simulation with dynamic partial FPGA reconfiguration applied to computer vision in ROS-based UAV,  31st Int. Workshop on Rapid System Prototyping (RSP), ESWeek, Virtual Conference, Sep. 2020.
  • K. A. Ali, M. Rizk, A. Baghdadi, J-Ph. Diguet and J. Jomaah, Memristor Overwrite Logic (MOL) for Energy-Efficient In-Memory DNN,  IEEE Int. Symposium on Circuits and Systems (ISCAS), Virtual Conference, Oct. 2020.
  • J. Mazuet, M. Narozny, C. Dezan and J-Ph. Diguet, A seamless DFT/FFT self-adaptive architecture for embedded radar applications,  30th International Conference on Field-Programmable Logic and Applications (FPL), Virtual Conference, Aug. 2020.
  • P. Gautier, J. Laurent and J-Ph. Diguet, Comparison of Market-based and DQN methods for Multi-Robot processing Task Allocation (MRpTA), The 4th IEEE International Conference on Robotic Computing (IRC), Taichung, Taiwan, March 2020 delayed as a virtual conference to Nov. 2020.
  • H. K. Mondal, N. Chatterjee, R. Cataldo and J-Ph. Diguet, Broadcast Mechanism Based on Hybrid Wireless/Wired NoC for Efficient Barrier Synchronization in Parallel Computing, IEEE 25th Asia and South Pacific Design Automation Conference (ASP-DAC), Beijing, China, Jan., 2020.
  • N. Chatterjee, H. K. Mondal, R. Cataldo and J-Ph. Diguet, CDMA-based Multiple Multicast communications on WiNOC for efficient parallel computing, IEEE/ACM Int. Symposium on Networks-on-Chip (NOCS), New York, USA, Oct., 2019.
  • R. Arakawa, N. Onizawa, J. Diguet and T. Hanyu, “Multi-Context TCAM Based Selective Computing Architecture for a Low-Power NN,” 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Genoa, Italy, 2019.
  • J-Ph. Diguet, Power-gated MRAMs for Memory-Based Computing with improved broadcast capabilities, The 25th International Symposium on Asynchronous Circuits and Systems (ASYNC), Hirosaki, Japan, May 2019.
  • F. Le Roy , C. Roland, D. Le Jeune and J-Ph. Diguet, Risk assessment of SDR-based attacks with UAVs, Int. Symposium on Wireless Communications Systems (ISWCS’2019), Oulu, Finland, Aug. 2019.
  • J. Mazuet, I-H. Atchadam, D. Heller, C. Dezan, M. Narozny and J-Ph. Diguet, QoS driven dynamic partial reconfiguration: Tracking case study, ReCoSoC, Jul 2019, York, United Kingdom.
  • A. Khannoussi, A. L. Olteanu, C. Labreuche, P. Narayan, C. Dezan, J-Ph. Diguet, J. Petit-Frère and P. Meyer, Integrating Operators’ Preferences into Decisions of Unmanned Aerial Vehicles: Multi-layer Decision Engine and Incremental Preference Elicitation, 6th International Conference (ADT), Durham, NC, USA, Oct 2019. In: Peke? S., Venable K. (eds) Algorithmic Decision Theory. ADT 2019. Lecture Notes in Computer Science, vol 11834. Springer.
  • M. Tréhin, J. Laurent, H. Kerhascoët and J-Ph. Diguet, An energy aware autopilot for sailboats, The 23rd Chesapeake Sailing Yacht Symposium, Annapolis, USA, Mar 2019.
  • R. Cataldo, R. Fernandes, K. Martin, J. Sepulveda, A. Susin, C. Marcon, J-Ph. Diguet, Subutai: Distributed Synchronization Primitives in NoC Interfaces for Legacy Parallel-Applications,  55th ACM/IEEE Design Automation Conference (DAC), San Francisco, CA, USA, June, 2018.
  • J. Sepulveda, C. Reinbrecht and J-Ph. Diguet, Security Aspects of Neuromorphic MPSoCs, 37th  IEEE/ACM Int. Conference On Computer Aided Design (ICCAD), San Diego, USA, Nov. 2018.
  • I. El Masri, H. K. Mondal, T. Le Gouguec, C. Roland, P-M. Martin, R. Allanic,  C. Quendo and J-Ph. Diguet, Accurate Channel Models for Realistic Design Space Exploration of Future Wireless NoCs, 12th IEEE/ACM Int. Symposium on Networks-on-Chip (NOCS), Torino, Italy, Oct. , 2018.
  • H. K. Mondal, R. C. Cataldo, C. Marcon, K. Martin, S. Deb and J-Ph. Diguet, Broadcast- And Power-aware Wireless NoC for Barrier Synchronization in Parallel Computing, 31st IEEE Int. System-on-Chip Conference (SOCC), Washington DC, USA, Sep. 2018.
  • J-Ph. Diguet, Multi-level control of reconfigurable architectures for autonomous vehicles, Invited Talk, WRC, 12th Workshop on Reconfigurable Computing (WRC), HiPEAC Conference, Manchester, UK, Janv. 24th, 2018.
  • S. Mak-Karé Gueye, G. Delaval, E. Rutten, D. Heller and J-Ph. Diguet, A Domain-specific Language for Autonomic Managers in Hardware Reconfigurable Architectures, 15th IEEE Int. Conf. on Autonomic Computing (ICAC), Trento, Italy, Sep., 2018.
  • Y. Rioual, Y. Le Moullec, J. Laurent, M. I. Khan and J-Ph. Diguet, Reward Function Evaluation in a Reinforcement Learning Approach for Energy Management, 16th Biennial Baltic Electronics Conf. (BEC) Oct. 8-10, 2018, Tallinn, Estonia.
  • S. Mak-Karé Gueye, G. Delaval, E. Rutten, J-Ph. Diguet, Discrete and Logico-numerical Control for Dynamic Partial Reconfigurable FPGA-based Embedded Systems : a Case Study, 2nd IEEE Conf. on Control Technology and Applications (CCTA), Copenhagen, Denmark, Aug., 2018
  • G.. M. Dias Santana, R. Silva de Cristo, C. Dezan, J-Ph. Diguet, D. P. Moya Osorio, K. R. L. J. Castelo Branco, “Cognitive Radio for UAV communications: Opportunities and future challenges”, Int. Conf. on Unmanned Aircraft Systems (ICUAS), Las Vegas, USA, June, 2018
  • C. Hireche, C. Dezan, J-Ph. Diguet and L. Mejias, BFM: a Resource-aware Method for Adaptive Mission Planning of UAVs, 35th IEEE Int. Conference on Robotics and Automation, (ICRA), Brisbane, Australia, May 2018.
  • M. Dridi, S. Rubini, M. Lallali, J. Sepulveda, F. Singhoff and J-Ph. Diguet, DAS: an efficient NoC Router for Mixed-Criticality Real-Time Systems, 35th IEEE Int. Conf. on Computer Design (ICCD), Nov. 2017.
  • K. Alhaj Ali, M. Rizk, A. Baghdadi, J-Ph Diguet and J. Jomaah, Towards Memristor-based Reconfigurable FFT Architecture, 29th IEEE Int. Conference on Microelectronics, Beirut, Lebanon, Dec. 10-13, 2017.
  • Y. Rioual, J. Laurent, E. Senn and J-Ph. Diguet , Reinforcement Learning Strategies for Energy Management in Low Power IoT, Int. Conf.  on Computational Science and Computational Intelligence (CSCI), Las Vegas, USA, Dec. 14-16, 2017.
  • E.M. Abdali, A. W. Hanniche, M. Pelcat, J-Ph. Diguet and F. Berry, Hardware Acceleration of the Tracking Learning Detection (TLD) Algorithm on FPGA, 11th Int. Conf. On Distributed Cameras (ICDSC), Stanford Univ., USA, Sep. 2017.
  • S. Mak-Karé Gueye, E.Rutten and J-Ph. Diguet, Autonomic Management of Missions and Reconfigurations in FPGA-based Embedded System, 11th NASA/ESA Conf. on Adaptive Hardware and Systems (AHS), Pasadena, CA, USA, July, 2017.
  • E.M. Abdali, F. Berry, M. Pelcat, J-Ph. Diguet and F. Palumbo, Exploring the Performance of Partially Reconfigurable Point-to-Point Interconnects, 12th Int. Symp. on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), , Madrid, Spain, July, 2017.
  • M. Rizk, J-Ph. Diguet, N. Onizawa, A. Baghdadi, M-J. Sepulveda, Y. Akgul, V. Gripon, T. Hanyu, NoC-MRAM Architecture for Memory-Based Computing: database-search case study,  15th IEEE International NEWCAS Conf., Strasbourg, France, June 2017.
  • C. Hireche, C. Dezan and J-Ph. Diguet, Online Diagnosis Updates for Embedded Health Management,  6th Mediterranean Conf. on Embedded Computing (MECO’17), Montenegro, June 2017
  • M. Rodrigues, D.F. Pigatto, J.V.C. Fontes, A.S.R. Pinto, J-Ph. Diguet, K.R. Branco, UAV Integration Into IoIT: Opportunities and Challenges, ICAS 2017, Barcelona.
  • K. J. Martin, M. Rizk, M.J. Sepulveda,  J-Ph. Diguet, Notifying Memories: a case-study on Data-Flow Applications with NoC Interfaces Implementation,  53rd ACM/IEEE Design Automation Conference (DAC), Austin, Texas, USA, June, 2016.
  • M. Dridi, S. Rubini, F. Singhoff and J-Ph. Diguet, DTFM: a flexible model for schedulability analysis of real-time applications on NoC-based architectures ,  3rd Int. Workshop on Real-Time and Distributed Computing in Emerging Applications (REACTION), in conjonction with RTSS, Roma, Dec.2016.
  • S. Zermani, C. Dezan, C. Hireche, R. Euler and J-Ph. Diguet, Embedded and Probabilistic Health Management for the GPS of Autonomous Vehicle, 5th Mediterranean Conf. on Embedded Computing (MECO’16), Montenegro, June 2016.
  • A. Aulery, J-Ph. Diguet, O. Sentieys, C. Roland, Low-cost autonomous postures/gestures recognition WBSN-based methods, 12th IEEE Int. Conference on Wearable and Implantable Body Sensor Networks (BSN), MIT, Cambridge, USA, June, 2015.
  • S. Zermani, C. Dezan, H. Chenini, J-Ph. Diguet, R. Euler. FPGA Implementation of Bayesian Network Inference for an Embedded Diagnosis, IEEE Conf. on Prognostics and Health Management (PHM), Jun 2015, Austin, Texas, United States.
  • D. Blouin, Y. Eustache, G. Ochoa-Ruiz and J-Ph. Diguet, Kaolin: a System-level AADL Tool for FPGA Design Reuse, Upgrade and Migration, Invited paper, NASA/ESA Conf. on Adaptive Hardware and Systems (AHS), Montreal, June. 2015.
  • S. Zermani, C. Dezan, J-Ph. Diguet, R. Euler. Bayesian Network-Based Framework for the Design of Reconfigurable Health Management Monitors. NASA/ESA Conf. on Adaptive Hardware and Systems (AHS), Montreal, June. 2015.
  • H. Chenini, D. Heller, C. Dezan, J-Ph. Diguet, D. Campbell, Embedded Real-Time Localization of UAV based on an Hybrid Device, IEEE ICASSP, Brisbane, Australia, April  2015.
  • A. Aulery, C. Roland, J-Ph. Diguet, Z. Zhongwei, O. Sentieys and P.  Scalart, Radio Signature Based Posture Recognition Using WBSN. 14th ACM/IEEE Int. Conf. on Information Processing in Sensor Networks (IPSN), Apr 2015, Seattle, USA.
  • M. J. Sepulveda, G. Gogniat, D. Sepulveda, J-Ph. Diguet and M. Strum, 3D-LeukoNoC: A Dynamic TSV-Based 3D-MPSoC Protection, International Conference on Reconfigurable Computing and FPGAs (Reconfig), Mexico, 2014.
  • P. Bomel, K. Martin and J-Ph. Diguet: Virtual Devices for Hot-Pluggable Processors. 17th Euromicro Conference on Digital System Design (DSD), 2014
  • M. J. Sepulveda, G. Gogniat, D. Florez, J-Ph. Diguet, C. Zeferino and M. Strum, Elastic Security Zones for NoC-Based 3D-MPSoCs?, ?21st IEEE International Conference on Electronics Circuits and Systems (ICECS), December 7-10, 2014 Marseille, France
  • T. Ngo, J-Ph. Diguet, K. Martin and D. Sepulveda, Communication-model based Embedded Mapping of Dataflow Actors on Heterogeneous MPSoC,  ECSI Conference on Design & Architectures for Signal & Image Processing (DASIP), Madrid, Spain, 2014.
  • J-C Morgère, J-Ph Diguet, J. Laurent, Electronic Navigational Chart Generator for a marine mobile augmented reality system,  MTS/IEEE OCEANS 2014, St Jones, Canada, 2014
  • J-C Morgère, J-Ph Diguet, J. Laurent, Mobile Augmented Reality System for marine navigation assistance, 12th IEEE International Conference on Embedded and Ubiquitous Computing, Milan, Italy, 2014.
  • J-Ph. Diguet, P. Coussy, C. Chavet. VLSI Architectures and NoCs for Neural Coding, 1st International Symposium on Brainware LSI, (invited talk), Mar 2014, Sendai, Japan.
  • J-Ph. Diguet, Self-Adaptive Networks On Chips, 27th Symposium on Integrated Circuits and Systems Design (SBCCI), (invited talk), 2014, Aracaju, Brazil.
  • D. Blouin, A. Plantec, P. Dissaux, F. Singhoff, J-Ph. Diguet, Synchronization of Models of Rich Languages with Triple Graph Grammars: An Experience Report, International Conference on Model Transformation (ICMT), York, UK, 2014.
  • D. Blouin, Y. Eustache, J-Ph. Diguet, Extensible Global Model Management with Meta-model Subsets and Model Synchronization, 2nd Int. Workshop on The Globalization of Modeling Languages (GEMOC),  co-located with ACM/IEEE MODELS, Valencia, Spain, 2014.
  • S. Zermani, C. Dezan, R. Euler and J-Ph. Diguet.Online Inference for Adaptive Diagnosis via Arithmetic Circuit Compilation of Bayesian Networks, Designing with Uncertainty: Opportunities & Challenges workshop, Mar 2014, York, UK.
  • J-Ph. Diguet, M J Sepulveda, N. Le Griguer, L. Caetano and M. Strum, Scalable NoC?Based Architecture of Neural Coding for New Efficient Associative Memories, IEEE/ACM Int. Conf. on Hardware – Software Codesign and System Synthesis (CODES-ISSS), Montreal, Canada, Oct. 2013. (draft, slides)
  • J?Ph. Diguet, Template-based design and programming of self-adaptive architectures for embedded systems (keynote), 8th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), Darmstadt, Germany, July, 2013.
  • X. An, E. Rutten, J-Ph. Diguet, N. Le Griguer, A. Gamatié, Autonomic Management of Dynamically Partially Recon?gurable FPGA Architectures Using Discrete Control. In Proc. of the 13th International Conference on Autonomic Computing (ICAC), San José, California, june 26-28, 2013.
  • X. An, E. Rutten, J-Ph. Diguet, N. Le Griguer, A. Gamatié, Discrete Control for Reconfigurable FPGA-based Embedded Systems, DCDS – 4th IFAC Workshop on Dependable Control of Discrete Systems, UK, Sep. 2013
  • V. Lapôtre, P. Murugappa, G. Gogniat, A. Baghdadi,  M. Hubner and J-Ph. Diguet, A reconfigurable multi-standard ASIP-based turbo decoder for an efficient dynamic reconfiguration in a multi-ASIP context, IEEE Int. Symposium on VLSI (ISVLSI), Natal, Brazil, Aug., 2013 
  • V. Lapôtre, P. Murugappa, G. Gogniat, A. Baghdadi, J-Ph. Diguet, J-N. Bazin, M. Hubner, Optimizations for an efficient reconfiguration of an ASIP-based turbo decoder,
  • IEEE Int. Symposium on Circuits and Systems (ISCAS), Beijing, China, May 2013.
  • P.Bomel, K.Martin, J-Ph.Diguet,  Standard-IOs based on Dynamically Allocated Virtual UARTs for Reconfigurable Multi-Processor Architectures on Hybrid FPGAs (Zynq case study), 20th Reconfigurable Architectures Workshop (RAW), Boston, May, 2013
  • C. Azar, S. Chevobbe, Y. Lhuillier and J-Ph. Diguet, SNET: a flexible, scalable, network paradigm for manycore architectures, 7th International Symposium on Networks-on-Chip, IEEE/ACM NOCS’13, Arizona, USA, April, 2013, 
  • N. Le Griguer, J. Laurent and J-Ph. Diguet, Tag Shepherd: a Low?cost and non?intrusive man overboard detection system, International conference on innovation in high performance sailing yachts (Innov’Sail), Lorient, France, June, 2013.
  • R. Douguet, J-Ph. Diguet, J. Laurent, Y. Riou, Open Data Buoy to Analyze Weather and Sea Conditions for Sailing Regattas, MTS/IEEE OCEANS Conference, Bergen, Norway, June, 2013.
  • R. Douguet, J-C. Morgère, J-Ph. Diguet, J. Laurent, Coupled open navigation and augmented reality systems for skippers, International conference on innovation in high performance sailing yachts (Innov’Sail), Lorient, France, June, 2013.
  • R. Douguet, J-Ph. Diguet, J. Laurent, Y. Riou, A New Real-time Method for Sailboat Performance estimation based on Leeway Modeling, 21th Chesapeake Sailing Yacht Symposium (CSYS), Annapolis, Maryland, USA, March 15-16, 2013.
  • Y. Corre, J-Ph. Diguet, L. Lagadec, D. Heller and D. Blouin, Fast Template-based Heterogeneous MPSoC Synthesis on FPGA, 9th Int. Symposium on Applied Reconfigurable Computing (ARC), (Springer Lecture Notes in Computer Science, ISSN: 0302-9743), LA, USA, March 2013.
  • J-Ph Diguet, N. Bergmann, J-C. Morgere, Embedded System Architecture for Mobile Augmented Reality. Sailor Assistance Case Study, Full Paper in 3rd Int. Conf. on Pervasive and Embedded Computing and Communication Systems (PECCS), Barcelona, Spain, Feb . 2013.
  • J-Ph Diguet, R. Douguet, Cyber-Physical Systems in Competition Sailboats: a challenging case study for a wide range of future applications (keynote), IEEE Workshop on Signal Processing Systems (SiPS), Quebec, CA, Oct. 2012.
  • S. Guillet, F. de Lamotte, N. Le Griguer, E. Rutten, J-Ph. Diguet, G. Gogniat, Modeling and Synthesis of a Dynamic and Partial Reconfiguration Controller, International Conference on Field Programmable Logic and Applications (FPL), Oslo, Norway, Aug. 2012.
  • S. Guillet, F. de Lamotte, N. Le Griguer, E. Rutten, G. Gogniat, J-Ph. Diguet, Designing formal reconfiguration control using UML/MARTE, 7th Int. Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), York, UK, 2012.
  • N. Khammassi, J-C. Le Lann, J-Ph. Diguet, A. Skrzyniarz, MHPM : Multi-Scale Hybrid Programming Model A flexible parallelization Medthodology,  14th IEEE International Conference on High Performance Computing and Communications, Liverpool, UK, 2012.
  • Y.Corre, V-T.Hoang, J-Ph.Diguet, D.Heller and L.Lagadec, HLS-based Fast Design Space Exploration of ad hoc hardware accelerators: a key tool for MPSoC Synthesis on FPGA, Int. Conference on Design and Architectures for Signal and Image Processing (DASIP), Karlsruhe, Germany, Oct. 2012
  • P.Wattebled, J-Ph.Diguet and J-L.Dekeyser, Membrane-based design and management methodology for parallel dynamically reconfigurable embedded systems, 7th Int. Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), York, UK, 2012.
  • V.Lapotre, S.Haddad, G.Gogniat, A.Baghdadi and J-Ph.Diguet. An analytical approach for sizing of heterogeneous multiprocessor flexible platform for iterative demapping and channel decoding, International Conference on ReConFigurable Computing and FPGAs, Mexico, Dec. 2012.
  • Y.Corre, J-Ph. Diguet, D.Heller, L.Lagadec, A Framework for High-Level Synthesis of Heterogeneous MP-SoC, 22nd ACM Great Lake Symposium on VLSI (GLSVLSI), Salt Lake City, USA, May 2012.
  • P. Cotret, J.Crenne, G.Gogniat and J-Ph.Diguet, Bus-based MPSoC security through communication protection: A latency-efficient alternative, 20th IEEE Int. Symposium on Field-Programmable Custom Computing Machines (FCCM),  Toronto, Canada, April 2012.
  • C.Azar, S.Chevobbe, Y.Lhuillier, J-Ph.Diguet, Dynamic Routing Strategy for Embedded Distributed Architectures,  Int. Conf. on Electronics Circuits and Systems (ICECS’11), Dec. 2011, Libanon.
  • J.Shield, J-Ph.Diguet and G.Gogniat, Asymmetric Cache Coherency: Improving Multicore Performance for Non-uniform Workloads, 6th Int. Workshop on Reconfigurable Communication-centric Systems-on-Chip  (ReCoSoC’11), June 2011, Montpellier, France.
  • J. Crenne, P. Cotret, G. Gogniat, R. Tessier, and J-Ph. Diguet, Efficient Key-Dependent Message Authentication in Reconfigurable Hardware, in the Proceedings of the International Conference on Field-Programmable Technology (FPT’11), Dec. 12-14, 2011, New Delhi, India. 
  • P. Cotret, J. Crenne, G. Gogniat, J-Ph Diguet, L. Gaspar, G. Duc, Distributed security for communications and memories in a multiprocessor architecture, in  Proceedings of the Reconfigurable Architecture Workshop (RAW’11), May 16-17, 2011 , Anchorage, Alaska.
  • J. Vidal, F. Frizon De Lamotte, G. Gogniat, J-Ph. Diguet, S. Guillet, Dynamic applications on reconfigurable systems: From UML model design to FPGAs implementation, in Design Automation and Test in Europe – DATE, France, 2011.
  • W. Allègre, C. Seguin, T. Burger, F. Delamotte, P. Berruet, J-L. Philippe, J-Ph. Diguet, Ambient Assisted Living with Linux, SYMPA/ Embedded With Linux Workshop, Saint-Malo 2011.
  • L.Ye, J-Ph.Diguet, G.Gogniat, Rapid application development on multi-processor reconfigurable systems, 20th IEEE Int. Conf. on Field Programmable Logic (FPL’10), Milano, Italy, Aug. 31st – Sep. 2nd, 2010.
  • T.B.T.Truong, F.De Lamotte, J-Ph.Diguet, F.Saïd, Alert Management for Home Healthcare Based on Home Automation Analysis , 32nd Int. Conf. of the IEEE Engineering in Medicine and Biology Society (EMBC’10), Buenos Aires, Argentina, 1st – 4th Sep., 2010.
  • R.Dafali, J-Ph.Diguet, MPSoC Architecture-Aware Automatic NoC Topology Design, 2010 Int. Work. on Network on Chip (IWNoC 2010) in IFIP Int. Conf. on Network and Parallel Computing (NPC’10), Zheng Zhou, China, Sep, 2010.
  • L.Ye, J-Ph.Diguet, G.Gogniat, XPSoC: A reconfigurable solution for Multimedia Contents Protection, Int. Conf. on High Performance Computing & Simulation (HPCS’10), Caen, France, June, 2010.
  • J.Vidal, F. De Lamotte, G.Gogniat, J-Ph.Diguet and P.Soulard, UML design for dynamically reconfigurable multiprocessor embedded systems, Design, Automation, and Test in Europe (DATE), Dresden, Germany, March, 2010.
  • G.Abgrall, F.Leroy, J-Ph.Diguet, J-Ph.Delahaye and Guy Gogniat, Latency Estimation Due To Middleware Used In Software Defined Radio Platforms, 6th Karlsruhe Workshop on Software Radios (WSR’10), Karlsruhe, March, 2010.
  • G. Gogniat, J. Vidal, L. Ye, J. Crenne, S. Guillet, F. De Lamotte, J-Ph. Diguet, P. Bomel, Self-reconfigurable embedded systems: from modeling to implementation, Int. Conf. on Engineering of Recon?gurable Systems and Algorithms (ERSA), Las Vegas, USA, July, 2010.
  • S. Guillet, F. Frizon De Lamotte, E. Rutten E., G. Gogniat, J-Ph. Diguet, Modeling and formal control of partial dynamic reconfiguration, Reconfig 2010, Mexico 2010.
  • J-Ph.Diguet, L.Ye, Y.Eustache, J.Crennes, P.Bomel, G.Gogniat, J.Vidal and Florent De Lamotte, Networked Self-Adaptive Systems : An Opportunity for Con?guring in the Large, Int. Conf. on Engineering of Recon?gurable Systems and Algorithms (ERSA), Las Vegas, USA, July, 2009. 
  • L.Ye, J-Ph.Diguet and G.Gogniat, Con?guration server for self-adaptive architectures, Int. Conf. DASIP, Sophia Antipolis, France, Sep., 2009. 
  • S. Dhouib, E. Senn, J-Ph.Diguet, J.Laurent and D. Blouin, Model driven high-level power estimation of embedded operating systems communication services, in the IEEE 6th Inter. Conf. on Embedded Software andSystems, ICESS, Hangzhou, China, May, 2009.
  • S.Dhouib, E. Senn, J-Ph.Diguet and J.Laurent, Modelling and estimating the energy consumption of embedded applications and operating systems, in IEEE 12th International Symposium on Integrated Circuits, ISIC, Singapore, Dec. 2009 
  • S.Turki, E.Senn, D.Blouin, S.Dhouib, J-Ph.Diguet and J.Laurent, Checking syntactic constraints on models using ATL model transformations, in the 1st Inter. Work. on Model Transformation with ATL, Nantes, France, 2009. 
  • R.Dafali and J-Ph.Diguet, Self-Adaptive Network Interface (SANI) : local component of a NoC con?guration manager, in Reconfig’09, Mexico, Dec. 2009. 
  • J.Vidal, F. De Lamotte, G.Gogniat, P.Soulard and J-Ph.Diguet, A co-design approach for embedded system modeling and code generation with UML and MARTE, Design, Automation, and Test in Europe (DATE), Nice, France, 2009. 
  • P.Bomel, J.Crenne, J-Ph.Diguet, L.Yen and G. Gogniat, Ultra-Fast Downloading of Partial Bitstreams Through Ethernet, ARCS 2009 – Architecture of Computing Systems, Delft, Mar., 2009.
  • T.B.T.Truong, F. Saïd-Hocine, F.Frizon de Lamotte and J-Ph.Diguet, Assisted living service identi?cation based on activity patterns, IEEE Conf. on Pervasive Computing and Application, Taiwan, Dec., 2009. 
  • T.B.T.Truong and F.Frizon de Lamotte and J-Ph.Diguet, Proactive remote healthcare based on multimedia and home automation services, IEEE Conf. on Automation Science and Engineering, Bangalore, India, Aug. 2009. 
  • S.Dhouib, J-Ph.Diguet, E.Senn, and J.Laurent, Energy models of real time operating systems on FPGA, Euromicro 4th Int. Work. on Operating Systems Platforms for Embedded Real-Time Applications (OSPERT), Prague, Czech Rep., 2008. 
  • F.Leroy, G.Abgrall, J-Ph.Delahaye, J-Ph.Diguet and Guy Gogniat, Comparative study of two Software De?ned Radio Environments, SDR Forum, Washington, Oct. 2008. 
  • E.Juin E.Senn, J.Laurent and J-Ph.Diguet, Re?ning power consumption estimations in the component based AADL design ?ow, ECSI Forum on speci?cation & Design Languages (FDL’08), Stuttgart, Germany, 2008. 
  • J-Ph.Diguet M.El Khodary, G.Gogniat, F.Muller, and M.Auguin, On simulating operating environment decisions in a sane network, IST AMWAS’08 (2nd AETHER – MORPHEUS Workshop- Autumn School From Recon?gurable to Self – Adaptive Computing), (invitation), Lugano, Switzerland, 2008. 
  • P.Bomel, G.Gogniat, and J-Ph.Diguet, A networked, lightweight and partial ly recon?gurable platform, ARC’08, London, UK, 2008. 
  • P.Bomel, G.Gogniat, J-Ph.Diguet and J.Crenne, Bitstreams repository hierarchy for FPGA partial ly recon?gurable systems, 7th IEEE Int. Symposium on Parallel and Distributed Computing (ISPDC’08), Cracovie, Pologne, 2008. 
  • R.Dafali, J-Ph.Diguet, and M. Sevaux, Key research issues for recon?gurable network-on-chip, Reconfig’08, Mexico, Dec. 2008. 
  • R.Vaslin, G.Gogniat, J-Ph.Diguet, R.Tessier, D.Unnikrishnan, and K.Gaj, Memory security management for recon?gurable embedded system, IEEE Int. Conf. on Field-Programmable Technology (FPT’08), Taipei, Taiwan, 2008. 
  • Y.Eustache and J-Ph.Diguet, Speci?cation and os-based implementation of self-adaptive, hardware software embedded systems, 6th Int. Conf. Hardware/software Codesign and System Synthesis (CODES-ISSS), Atlanta, USA, 2008.
  • M.El Khodary, J-Ph.Diguet, G.Gogniat, Operating Environment on-line Metrics for Application Architecture Matching, 25th IEEE Norchip Conf., 19-20 Nov. 2007, Aalborg, Denmark
  • R.Dafali, J-Ph.Diguet, S.Evain, Y.Eustache, E.Juin, ?Spider CAD Tool: case study of NoC IP generation for FPGA, in DASIP 07, Workshop on Design and Architectures for Signal and Image Processing, Grenoble, France, November 27-29 2007.
  • S.Evain, J-Ph.Diguet, Efficient space-time noc path allocation based on mutual exclusion and pre-reservation. ACM Great Lakes Symp. on VLSI, Stresa-lago, Italy, pp 457-460, March 2007.
  • H. Liu, J-Ph. Diguet, C. Jego, M. Jézéquel, E. Boutillon, Energy Efficient Turbo Decoder By Reducing The State Metric Quantization, SIPS’07, Sanghai, China, Oct. 2007
  • E.Wanderley, R.Vaslin, G.Gogniat and J-Ph.Diguet, A Code Compression Method to Cope with Security Hardware Overheads, 19th IEEE International Symposium on Computer Architecture and High Performance Computing, October 24-27, 2007, Gramado, RS, Brazil
  • R. Vaslin, G. Gogniat, J-Ph. Diguet, R. Tessier, W. Burleson, High Efficiency Protection Solution for Off-Chip Memory in Embedded Systems, The
  • International Conference on Engineering of Reconfigurable Systems and Algorithms, June 25-28, 2007, Las Vegas, Nevada, USA
  • E. Wanderley, G. Gogniat, J-Ph. Diguet, A Code Compression Method With Confidentiality and Integrity Checking, The 2007 International
  • Conference on Embedded Systems and Applications, June 25-28, 2007, Las Vegas, Nevada, USA
  • E. Wanderley, R. Elbaz, L. Torres, G. Sassatelli, R. Vaslin, G. Gogniat, J-Ph. Diguet, IBC-EI: An Instruction Based Compression method with Encryption and Integrity Checking, 3rd International Workshop on Reconfigurable Communication Centric System-on-Chips (ReCoSoC’07), 18th-20th June 2007,
  • Montpellier, France
  • R. Vaslin, G. Gogniat, J-P Diguet, E. Wanderley, R. Tessier, W. Burleson, Low latency solution for confidentiality and integrity checking in embedded systems with off-chip memory, 3rd International Workshop on Reconfigurable Communication Centric System-on-Chips (ReCoSoC’07), 18th-20th June 2007, Montpellier, France
  • Y. Eustache, J-Ph. Diguet, G. Gogniat, The Allele Search Lab to Improve Heterogeneous Reconfigurable Platform Design Skills, The 2nd International Workshop on Reconfigurable Computing Education, May 12, 2007, Porto Allegre, Brasil
  • J-Ph. Diguet, G. Gogniat, S. Evain, R. Vaslin, E. Juin, NOC-centric security of reconfigurable SoC, The 1st ACM/IEEE International Symposium on Networks-on-Chip, May 7-9, 2007, Princeton University, New Jersey, USA (slides)
  • E. Wanderley, G. Gogniat, J-Ph. Diguet, Bus Decryption Overhead Minimization with Code Compression, The 3rd III IEEE Southern Conference on Programmable Logic, February 26-28, 2007, Mar del Plata, Argentina.
  • S. Rouxel, G. Gogniat, J-Ph. Diguet, J-L. Philippe, C. Moy, System Level Design with UML: a Unified Approach, IEEE Symposium on Industrial Embedded System (IES’06), October 2006, Antibes Juan-Les-Pins, France.
  • S. Rouxel, G. Gogniat, J-Ph. Diguet, J-L. Philippe, C. Moy, A3S Method and Tools for Analysis of Real-Time Embedded Systems, International Workshop on Modeling and Analysis of Real-Time and Embedded Systems (MARTES’06), October 2006, Genova, Italy
  • R. Vaslin, G. Gogniat, J-Ph. Diguet, Secure architecture in embedded systems: an overview, Reconfigurable Communication-centric SoCs (ReCoSoc’06), July 3-5, 2006, Montpellier, France
  • R. Vaslin, G. Gogniat, J-Ph. Diguet, A. Pegatoquet, Trusted Computing – A New Challenge for Embedded Systems, The 13th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2006), December 10-13, 2006, Nice, France
  • S.Rouxel, G.Gogniat, J-Ph.Diguet, J-L.Philippe, A3S Method and Tools for Analysis of Real-Time Embedded Systems, International Workshop on Modeling and Analysis of Real-Time and Embedded Systems, Italie, Oct. 2006.
  • S.Evain, J-Ph.Diguet,  M.El Khodary, D.Houzet, Automated derivation of NoC Communication Specifications from Application Constraints, SIPS 2006, oct. 2006, Banff, Canada.
  • R.Vaslin and G.Gogniat and J-Ph.Diguet, Secure architecture in embedded systems: an overview, Cryptarchi, Kosice, Slovakia, 2006. 
  • Y.Eustache, J-Ph.Diguet, M.El Khodary, RTOS-based Hardware Software Communications and Configuration Management, Int. Conference on Engineering of Reconfigurable Systems & Algorithms, Las Vegas, USA, June, 2006
  • Y.Eustache, J-Ph.Diguet, Y.Eustache, M.El Khodary, RTOS extensions for dynamic hardware / software monitoring and configuration management, 13th Reconfigurable Architectures Workshop (RAW 2006), Greece, April 2006.
  • R.Vaslin, G. Gogniat, J-Ph.Diguet, A.Pegatoquet, Trusted Computing – A New Challenge for Embedded Systems,  13th IEEE Int. Conf. on Electronics, Circuits and Systems, Dec. 2006
  • R.Vaslin, G. Gogniat, J-Ph.Diguet, Secure architecture in embedded systems: an overview, Reconfigurable Communication-centric SoCs (ReCoSoC’06),  Montpellier, Jun. 2006.
  • J-Ph.Diguet, Y.Eustache, N.Ben Amor, S.Hammami,  Feedback control modelling of learning reconfigurable embedded systems, RECOSOC, Montpelleier, France, June, 2005.
  • J-Ph.Diguet, Y.Eustache, Milad El Khodary, Feedback Control Learning Model for QoS, Power & Performance Management of Reconfigurable Embedded Systems, 8th Int. Symposium on DSP and Communication Systems, DSPCS’2005, Noosa Heads, Australia, 19-21 December 2005.
  • S.Rouxel, J-Ph.Diguet, N.Bulteau, J.Carre-Gourdin, J-E.Goubard, C.Moy, UML Framework for PIM and PSM Verification of SDR Systems, SDR Forum Technical Conference, Anaheim (USA), November 2005.
  • H.Tmar, J-Ph.Diguet, M.Abid, J-L.Philippe, QoS Consideration in Embedded Real-Time System Codesign, Embedded Real-Time Systems Implementation Workshop in conjunction with the 26th IEEE International Real-Time Systems Symposium (RTSS05), Dec. 5-8, 2005 Miami, USA.
  • S.Evain, J-Ph.Diguet, From NoC Security Analysis To Design Solutions, IEEE Work. On Signal Processing Systems, SIPS’05,  Nov. 2005, Athens
  • J-Ph.Diguet, Y.Eustache, N.Ben Amor and S.Hammami, Feedback control modelling for learning recongurable embedded systems, RECOSOC, june 2005, Montpellier, France.
  • S.Evain, J-Ph.Diguet, D.Houzet, µSpider: A CAD Tool for Efficient NoC Design, IEEE NORCHIP 2004, Oslo, NORWAY, Nov. 8-9, 2004.
  • S.Evain, J-Ph.Diguet, D.Houzet, A Generic CAD Tool for Efficient NoC Design, IEEE Int. Symp. on Intelligent Signal Processing and Communication Systems (ISPACS),Seoul, Korea, November 18-19, 2004.
  • Y.Le Moullec, N.Ben Amor, J-Ph.Diguet and P.Koch, Follow-up Modelling for Wireless Personal Communication Systems, 7th Int. Symp. on Wireless Personal Multimedia Com., sep. Italy, 2004.
  • A.Delautre, J-E.Goubard, G.Gogniat, S.Rouxel, J-Ph. Diguet, C.Moy and N.Bulteau, UML profiles towards waveform performances verification, Wireless World Research Forum (WWRF), Oslo, Jun, 2004.
  • N.Ben Amor, Y.Le Moullec, J-Ph.Diguet, J-L.Philippe, M.Abid, Design of an adaptive multimedia system, 16th Int. Conf on Microelectronics, Tunis, Tunisia, Dec., 2004
  • H.Tmar, A.Azzedine, J-Ph.Diguet, J-L.Philippe, M.Abid, RTDT a static QoS Manager, RT scheduling, HW/SW partitioning CAD Tool, 16th Int. Conf on Microelectronics, Tunis, Tunisia, Dec., 2004.
  • Y.Le Moullec, N.Ben Amor, J-Ph.Diguet, J-L.Philippe, M.Abid, Multi-granularity Metrics For The Era Of Strongly Personalized SOCs, Design Automation & Test in Europe (DATE), March, Munich, 2003.
  • S.Bilavarn, E.Debes, P.Vandergheynst and J-Ph.Diguet, Reconfigurable Coprocessor for Media Streaming, IEEE Int. Conf. On Multimedia and Expo (ICME), June, Taiwan, 2004.
  • M.Auguin, K.Ben Chehida, J-Ph.Diguet, X.Fornari, A-M.Fouilliart, C.Gamrat, G.Gogniat, P.Kajfasz,  Y.Le Moullec, Partitioning and CoDesign tools \& methodology for Reconfigurable Computing: the EPICURE philosophy, 3rd Int. Work. on Systems, Architectures, Modeling Simulation (SAMOS03), Greece, Jul., 2003.
  • T.Gourdeaux, J-Ph.Diguet and J-L.Philippe, Design Trotter: Inter-function Cycle Distribution Step,11th Int. Conf. RTS embedded Systems, Paris, April 2003.
  • Y.Le Moullec, P.Koch, J-Ph.Diguet, J-L.Philippe, Design Trotter : Building and Selecting Architectures for Embedded Multimedia Applications, IEEE Int. Symp. on Consumer Electronics (ISCE03), Dec. 3-5, 2003, Sydney, Australia.
  • Y.Le Moullec, J-Ph.Diguet and J-L.Philippe, Design-Trotter: a Multimedia Embedded Systems Design Space Exploration Tool, IEEE Int. Work. on Multimedia Signal Processing, St. Thomas, US, Dec.02.
  • A.Azzedine, J-Ph.Diguet and J-L.Philippe, Large Exploration for HW/SW Partitioning of Multirate and Aperiodic Real-Time Systems, 10th IEEE/ACM Int. Symp. on Hardware/Software Co-Design, Estes Park USA, May 6-8 2002.
  • Y.Le Moullec,J-Ph.Diguet, D.Heller and J-L.Philippe, Fast and Adaptive Data-flow and Data-transfer Scheduling for Large Design Space Exploration, ACM GLSVLSI 2002, April 18-19,New-York, USA.
  • Y.Le Moullec, P.Koch and J-Ph.Diguet, A Power Aware System-Level Design Space Exploration Framework, IEEE DDECS 2002, April 17-19, Brno, Czech Republic.
  • L.Bossuet, G.Gogniat, J-Ph.Diguet, J-L.Philippe, A Modeling Method for Reconfigurable Architectures, Int. Workshop on System-on-Chip for Real-Time Applications, July 6-7, 2002, Banff, Canada.
  • J-Ph.Diguet, G.Gogniat, P.Danielo, M.Auguin and J-L.Philippe, The SPF model, Forum on Design Language, FDL, Tu ̈bingen, Germany,sep.2000.
  • Y.Le Moullec, J-Ph.Diguet, J-L.Philippe, A Scheduling Framework for System-Level Estimation, 7th IEEE Int. Conf. on Electronics, Circuits & Systems, Dec. 17-20, 2000, Lebanon.
  • S.Montfort, J-Ph.Diguet, J-L.Philippe, ASIP Design Methodology for Telecommunications, Int. Conf. on In- formation Society (IS2000), Nov.2000, Aizu, Japan.
  • H.Thomas, J-Ph.Diguet and J-L.Philippe, A methodology for an application profiling at system level, IEEE SiPS, Taiwan, 20-22 Oct. 1999.
  • J-Ph.Diguet, S.Wuytack, F.Catthoor and H.De Man, Formalized methodology for data reuse exploration in hierachical memory mappings, ACM/IEEE Int. Symp. on Low Power Elec. & Design, Monterey, USA aug, 1997.
  • J-Ph.Diguet, O.Sentieys, D.Chillet and J-L.Philippe, IEEE ICASSP, VLSI High Level Synthesis of Fast Exact Least Mean Square Algorithms, Munich, 1997.
  • O.Sentieys, J-Ph.Diguet, J-L.Philippe and E.Martin, Hardware Module Selection for Real Time Pipeline Architectures using Probabilistic Cost Estimation, ASIC 96; Rochester, NY, 23-27 sep.96.
  • O.Sentieys, D.Chillet, J-Ph.Diguet and J-L.Philippe, Memory Module Selection for High Level Synthesis, in IEEE Workshop on VLSI S.P., San-Francisco, USA 1996.
  • J-Ph.Diguet, O.Sentieys, J-L.Philippe and E.Martin, Probabilistic Resource Estimation for pipeline architecture, IEEE Workshop on VLSI S.P. ; Sakai, Japan Oct. 95 ; pp 217-226.
  • J-Ph.Diguet, O.Sentieys, J-L.Philippe and E.Martin, How Specify an Algorithm in VLSI architectural Synthesis, a Vocal Coding Application, IEEE Workshop on VLSI S.P., San Diego, Oct.94 ; pp346-355.

Book Chapters

  • J.Crenne, P.Bomel, G.Gogniat and J-Ph.Diguet, End-to-End Bitstreams Repository Hierarchy for FPGA Partially Reconfigurable Systems in Algorithm-Architecture Matching for Signal and Image Processing Lecture Notes in Electrical Engineering, 2011, Volume 73, Part 2, 171-194.
  • C.Gamrat, J-M.Philippe, C.Jesshope, A.Shafarenko, L.Bisdounis, U.Bondi, A.Ferrante, J.Cabestany, M.Hübner, J.Pärsinnen, J.Kadlec, M.Danek, B.Tain, S.Eisenbach, M.Auguin, J-Ph.Diguet, E.Lenormand, and J-L.Roux, AETHER: Self-Adaptive Networked Entities: Autonomous Computing Elements for Future Pervasive Applications and Technologies, in Reconfigurable Computing, From FPGAs to Hardware/Software Codesign, J.Cardoso, M.Hübner (Eds.), Chap. 7, pp. 149-184,2011.
  • R.Dafali and J-Ph.Diguet, Keys for Administration of Recon?gurable NoC Self-Adaptive Network Interface Case Study, in Dynamic Recon?gurable Network-on-Chip Design : Innovations for Computational Processing and Communication, IGI Global, Ed. Jih-Sheng Shen and Pao-Ann Hsiung, Dec. 2009. 
  • E.Senn, S.Dhouib, S.Turki, D. Blouin, J. Laurent, S.Turki and J-Ph.Diguet, Power and energy consumption estimations in model based design, in Languages for Embedded Systems and their Applications, Springer Netherlands, Ed. Martin Radetzki, 2009.
  • S.Rouxel, G.Gogniat, J-Ph. Diguet,J-L. Philippe, C.Moy, Model driven Engineering for distributed Real-Time Embedded Systems in From MDD concepts to Experiments and Il lustrations (Chap. 7), ISTE Ltd., Sep. 2006. (ISBN : 1905209592)